Intel® Atom™ Ultra 3 535HL Processor

Intel Corporation · Eventide Architecture · 2028

Intel® Atom™ Ultra 500 Series Processors · Eventide Generation · 8MB Cache, up to 4.1 GHz

Atom Ultra 500 HL · Mobile FOveros 2.0 Photonic 93 TOPS AI (NPU)

4.1 GHz

Max Turbo

Physical Cores

NPU AI TOPS

~8 MB SRAM

Total Cache

Interactive Die Map — hover to inspect, click to drill in

Essentials▲

Product Collection

Intel® Atom™ Ultra 500 Series Processors (Eventide)

Code Name

Eventide · one-off generation, spiritual successor to Lunar Lake + Panther Lake

Processor Number

Intel® Atom™ Ultra 3 535HL

Vertical Segment

Mobile (H — Standard Power)

Status

Launched

Launch Date

Q4 2028

Lithography (Primary — Compute)

Not present on this line · Atom carries no 04A silicon — efficiency-first 06E only

Lithography (Efficiency — LP Island) ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

Intel 06E (0.6nm-class FinFlex GAA) · LP Island cores, Arc Druid, BionzXR, LPNPU

Lithography (Ancillary) ?2D Kanvas Renderer — a shader-free 2D compositing tile that lets 3D GPU tiles power down entirely at idle.

Intel 14A-E · MFX, IPU, 2DKR, I/O, Klangkerne, PSM, Killer S1, Display, GNA

Package Interconnect ?Intel's photonic tile-to-tile interconnect, co-developed with Lightmatter (USA). Replaces copper die-to-die links with on-package optical signaling.

Intel FOveros 2.0 (FiberOptic-VEROS) — photonic; co-developed with Lightmatter (USA)

Total Tiles on Package

Recommended Customer Price

$565 USD

Supplemental Information▼

Marketing Status

Launched

Embedded Options Available

Use Conditions

Phone / Tablet

Datasheet

Contact Intel / OEM

CPU Specifications▲

Total Physical Cores

Total Logical Threads

Compute Tiles

Total UHP Cores (Solar Eclipse)

Not present

Total DP Cores (Sunset Cove)

Not present

Total SPE Cores (Venusmont)

Not present

Total UHE Cores (Lunar Eclipse)

Total LPE Cores (Darkmont)

UHP Base / Max Turbo

—

UHP V8 HyperBOOST (peak) ?V8 HyperBOOST — an 8–40ms hardware-scheduled burst clock above sustained Max Turbo, thermally gated and scheduled entirely by Thread Director.

—

DP Base / Max Turbo

—

UHE Base / Max Turbo

1.6 GHz / 4.1 GHz

LPE Base / Max Turbo

0.8 GHz / 2.9 GHz

Overclocking

No — locked multiplier

Instruction Set Extensions

AVX2, AVX-512 (UHP/DP only), AMX-Tile, AMX-INT8, AMX-BF16, AES-NI, SHA-NI

Instruction Set

64-bit

Intel® 64

Yes

Thread Director Scheduling Classes ?A dedicated in-fabric scheduling tile making hardware-native, sub-100ns core/GPU/NPU placement decisions.

5 hardware classes (UHP/DP/SPE/UHE/LPE) + GPU-coupled RT/BVH dispatch class

Total L2 Cache

7.3 MB

Processor Base Power

Maximum Turbo Power

Intel® Deep Learning Boost (CPU)

AI Software Frameworks Supported (CPU)

OpenVINO, DirectML, WindowsML, PyTorch, TensorFlow

LP Island Tile▼

The LP Island is present on every Eventide SKU — even fanless, GPU-less parts — and is the last domain to power down. It bundles efficiency cores, the always-on Arc Druid iGPU, BionzXR media encode, and LPNPU inferencing into a single tile.

UHE Cores (Lunar Eclipse)

LPE Cores (Darkmont)

UHE Base / Max Turbo

1.6 GHz / 4.1 GHz

LPE Base / Max Turbo

0.8 GHz / 2.9 GHz

Process Node

Intel 06E (0.6nm-class FinFlex GAA)

L3 (LP Island, shared)

8 MB

Integrated LP iGPU

Arc® Druid D330 · see dedicated Graphics — Arc Druid section

Integrated Media Engine ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

QuickSync BionzXR, 1 core · see Media & Imaging section

Integrated NPU

LPNPU, 88 TOPS · see AI — LPNPU section

Minimum Assured Power (Supersaver)

0.05W

Cache Specifications▼

L0 (UHE, per core)

48 KB instruction buffer

L1 (UHE, per core)

128 KB

L1 (LPE, per 4-core cluster)

128 KB shared

L2 (UHE, per core)

3 MB

L2 (LPE, per 4-core cluster)

1 MB shared

Total L0 / L1 / L2 (approx.)

96 KB / 416 KB / 7.3 MB

L3 (Compute Tile, shared)

Not present

L3 (LP Island, shared)

8 MB

Kache Kore™ L4 / bLLC ?A large shared L4 / bLLC cache pool acting as latency-hiding DRAM for hot working sets, shared across CPU, GPU and NPU tiles.

Not present · phone-scale package has no room for the bLLC interposer — LPDDR6X is the primary memory tier instead

Total SRAM Cache (approx.)

~8 MB SRAM · no L4 bLLC on this line

Kache Kore™ Round-Trip Latency ?A large shared L4 / bLLC cache pool acting as latency-hiding DRAM for hot working sets, shared across CPU, GPU and NPU tiles.

Not applicable

Memory Specifications▼

Atom is the LPDDR6X-primary tier — with no Kache Kore bLLC to mask ZAM's higher raw latency, on-package Z-Angle Memory loses its usual advantage at phone scale, so this line runs conventional LPDDR6X directly instead.

Primary Memory Type ?A large shared L4 / bLLC cache pool acting as latency-hiding DRAM for hot working sets, shared across CPU, GPU and NPU tiles.

LPDDR6X (on-package, soldered) — no ZAM, no Kache Kore on this line

Max LPDDR6X Capacity

20 GB

LPDDR6X Speed

LPDDR6X-8600

Max # of Memory Channels

2× (dual-channel LPDDR6X)

ECC Memory Support

In-band ECC (LPDDR6X)

Intel DirectStorage 2.0 ?Intel DirectStorage 2.0 — a staged data path from DDR6 through ZAM to the Kache Kore bLLC for fast asset streaming.

UFS 5.0 → LPDDR6X hot data · no Kache Kore staging tier on this line

Graphics — Arc Druid (LP)▼

Arc® Druid is the low-power iGPU — a dedicated Xe4E tile capable of driving the full desktop and light 3D without ever spinning up a Compute Tile or an Elementalist GPU tile. On Core i500 it is the ONLY graphics on the package (no Elementalist); the F-suffix removes it entirely, requiring a discrete GPU.

Graphics Tile

Intel® Arc® Druid D330

Process Node

Intel 06E

Xe4E-Cores

Shading Units

1,792

Boost Clock

1.69 GHz

Function

Always-on low-power 3D + desktop composition fallback

DirectX Support

DirectX 12 Ultimate (FL 12_1)

Power Envelope

Min 0.3W standby, max ~3W active

Graphics — 2DKanvas (2D)▼

2DKanvas (2DKR) is purpose-built 2D silicon — zero 3D ALUs, zero shaders, zero Z-buffers. Every transistor is dedicated to rendering the desktop at sub-millisecond latency for well under a watt, so the 3D GPU tiles can power down entirely at idle.

Tile ?2D Kanvas Renderer — a shader-free 2D compositing tile that lets 3D GPU tiles power down entirely at idle.

2DKanvas (2DKR)

Process Node

Intel 14A-E

Function

Dedicated 2D/GUI compositor; no 3D ALUs

Blitter Engine

Modernised hardware blend/scale/composite pipeline

Typical Power

< 1W sustained desktop composition

Enables

Full desktop responsiveness with every 3D GPU tile powered off

Display Engine▼

Max Displays Supported

2 simultaneous native

iDP (Intel Display Protocol) 1.0

Up to 5,120×2,880 @ 240 Hz · in-house eDP derivative over PCIe 6.0 ×16×3 · up to 2× ports

iDP Color Depth

Up to 96-bit (RGB+MCY)

DisplayPort

DP 2.1b UHBR20

eDP

eDP 1.6

HDMI

HDMI 2.2

Codec Transport

VRV1 / VRV2 over iDP — carries resolutions exceeding raw link bandwidth compressed, without quality loss

Variable Refresh Rate

Full VRR · XCD-LED DIAC

HDR Support ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

HDR10+ Ultra, Dolby Vision 2 (via BionzXR tone-mapping)

Display Stream Compression

VESA DSC 1.2a

Unified Display Engine

Any GPU tile (Elementalist, Druid, 2DKanvas) can drive any output — no MUX switching, no GPU-to-GPU frame copy

AI — LPNPU▼

LPNPU delivers always-on inferencing — wake-on-voice, presence sensing, and Thread Director's predictive co-pilot — within a sub-1.5W envelope, and never powers down.

Tile

LPNPU (Always-On NPU)

Process Node

Intel 06E

Peak Throughput

88 TOPS

Power Envelope

< 1.5W, always-on

Function ?A dedicated in-fabric scheduling tile making hardware-native, sub-100ns core/GPU/NPU placement decisions.

Wake-on-voice, presence sensing, Thread Director predictive co-pilot

AI — GNA (Audio NPU)▼

GNA is a milliwatt-class always-on inference tile dedicated to audio intelligence — noise suppression, wake word, and speaker isolation.

Tile ?Gaussian & Neural Accelerator — a milliwatt-class always-on inference tile dedicated to audio intelligence.

GNA 5.0 (Gaussian & Neural Accelerator)

Process Node

Intel 14A-E

Peak Throughput

5 TOPS

Function ?Intel's always-on audio DSP pipeline, accelerated by the GNA tile for noise suppression and wake-word detection.

Intel® Smart Sound Technology acceleration — noise suppression, wake word, speaker isolation

Power Envelope

< 100 mW typical

Audio — Klangkerne▼

Klangkerne is the base die of Eventide's audio stack — an 18mm² DSP die carrying the mixer/DSP grid, the Tiefton resonator bank and the Hallraum output stage, co-engineered with Bang & Olufsen's acoustic engineering group in Copenhagen.

Tile

Klangkerne (Audio DSP Base Die)

Die Size

18 mm²

Process Node

Intel 14A-E

Mixer / DSP Grid

Multi-channel real-time mixing and effects DSP

Tiefton Resonator Bank

Physical-modeling resonance synthesis for spatial reverb

Hallraum Output Stage

Final transducer-matched rendering + codec bridge

Stacked Die ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.

SoRT (Sound Ray Tracing) — hybrid-bonded on top · see dedicated SoRT section

Intel® Smart Sound Technology ?Intel's always-on audio DSP pipeline, accelerated by the GNA tile for noise suppression and wake-word detection.

Yes — accelerated by the GNA tile

Intel® High Definition Audio

Yes

Audio — SoRT (Sound Ray Tracing)▼

SoRT (Sound Ray Tracing) is a dedicated 7.2mm² die hybrid-bonded onto Klangkerne via Foveros 2.0 — the world's first shipping consumer sound-ray-tracing silicon, computing real acoustic reflection and diffraction fields in hardware.

Tile ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.

SoRT (Sound Ray Tracing Die)

Die Size

7.2 mm²

Process Node

Intel 04A

Bond to Klangkerne

Foveros 2.0 hybrid bond · 0.4µm pitch · +38µm package height

SoRT Clusters ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.

×2 · fixed-function pipeline, no shader cores — feature-uniform across tiers, ray budget quantity-scaled

Traversal Engine (per cluster)

96M ray-steps/s · 210 mW peak

Diffraction Unit (per cluster)

2.4M UTD edge-diffraction evaluations/s

Binaural Divergence Unit (per cluster)

512 paths/frame forked · 1.08× ray overhead

IR Assembler (per cluster)

8-frame history · 2,048-tap staging buffer

Material LUT (per cluster)

64 × 8 bands × 16-bit SRAM · 1-cycle access

Ray Budget (total)

12,288 ray-paths per 128-sample audio block

Max Concurrent Sources

128

Real-Time Deadline ?Intel's audio ray-tracing platform brand — the software/driver layer that programs the SoRT die.

2.67 ms hard deadline per acoustic block (Sonoral™ runtime contract)

Typical Power

~118 mW · vs. 1.8W+ for a CPU-software approximation of the same field

Ray-Traced Frame Cost

0.0% — never shares the GPU render path

Hybrid-Bond Handoff Latency ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.

0.02 ms (SoRT parametric IR → Klangkerne convolution engine)

Programmed By ?Intel's audio ray-tracing platform brand — the software/driver layer that programs the SoRT die.

Sonoral™ runtime, under the AcoustX™ platform brand

Audio — Sonoral™ & AcoustX™ Platform▼

🎧

Sonoral™ Runtime

The software/driver layer that programs the SoRT die — enforces the 2.67ms real-time acoustic block deadline and hands parametric impulse responses to Klangkerne.

🔊

AcoustX™ Platform

Intel's acoustic ray-tracing platform brand, covering SoRT hardware and the Sonoral runtime together — the marketed name for Eventide's spatial audio stack.

🎚️

Intel® Smart Sound Technology

Always-on audio DSP pipeline, accelerated by the GNA tile for continuous noise suppression and wake-word detection.

🎙️

Intel® High Definition Audio

Standard multi-channel HD audio codec interface, layered beneath Klangkerne's DSP pipeline.

Media & Imaging▼

QuickSync BionzXR Cores ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

1 core (Intel 06E) — co-developed with Sony Semiconductor

BionzXR Encode Codecs ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

AV2 (world-first hardware encoder), AV1, H.266/VVC, H.265, H.264, VRV1, VRV2, ProRes

BionzXR Decode Codecs ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

All encode codecs + VP9, VP8, MPEG-4, VC-1

Max Encode Resolution

8K120 ProRes; 8K240 AV1; 4K480 AV2

MFX QuickSync (Low-Power) ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.

AV2, AV1, H.266, H.265, H.264, VP9 decode · ~35% lower power than BionzXR for sustained playback

IPU Version ?Image Processing Unit — Intel × Sony's camera pipeline tile, supporting up to 201MP native sensor input.

Intel IPU 8.2 (Intel 14A-E)

Max Camera Input

64 MP — native USB-C / Thunderbolt sensor ingestion

Intel® Gaussian & Neural Accelerator ?Gaussian & Neural Accelerator — a milliwatt-class always-on inference tile dedicated to audio intelligence.

Yes (GNA 5.0) · see AI — GNA section

Expansion Options▼

PCIe Revision

PCIe 6.0

PCI Express Configurations

1×8, 2×4

Max # of PCI Express Lanes

Thunderbolt Version

Thunderbolt 6 · 160 Gbps symmetric / 240 Gbps boost; supports Intel×Sony eDP 2.0 tunnel

Thunderbolt Ports

Up to 4

USB Specification

USB4 Gen 4×2 (80 Gbps), USB 3.2 Gen 2×2

Intel® DirectStorage Storage Path ?Intel DirectStorage 2.0 — a staged data path from DDR6 through ZAM to the Kache Kore bLLC for fast asset streaming.

UFS 5.0 · ~7 GB/s sustained · phone tiers use on-board UFS, not an NVMe slot

Wireless & Connectivity▼

WiFi Specification ?Intel × OPPO's Killer SignalBoost S1 wireless tile — Wi-Fi 7, Bluetooth 6.2 and 5G cellular with SONAR presence sensing.

Intel® Killer™ Wi-Fi 7 (802.11be) — via Killer SignalBoost S1

WiFi Chips

1× X1 chip (4 bands)

Bluetooth

Bluetooth Core 6.2

Cellular

5G Sub-6 / mmWave, 4G LTE, VoLTE

Antenna Support

Up to 2× 360° Intel LinkBoost antennae; SONAR user presence via WiFi signal

Intel® Wake on Voice

Yes (LPNPU-powered; always-on)

Intel® Wake on Wi-Fi (SONAR)

Yes

Security & Manageability▼

🛡️

Intel® vPro® Eligibility

Hardware-rooted manageability and security platform for business-class systems.

🕵️

Intel® Threat Detection Technology (TDT)

NPU + hardware performance-monitor anomaly detection on the PSM tile — 150+ MITRE ATT&CK behaviors, ransomware and cryptojacking detection below the OS.

📡

Intel® Active Management Technology (AMT)

Out-of-band remote management via CSME 2.0 — works even when the OS is crashed, hung, or powered off.

🔐

Microsoft Pluton 2.1

Hardware TPM 2.1 + Pluton security processor, integrated into the PSM tile as a root of trust below the OS — parallel to Alloy OS's EGP root.

🧩

Eventide Guardian Protocol (EGP)

Intel-developed silicon root of trust for Alloy OS — on-tile AES-256 key vault, per-app hardware attestation, anti-rollback firmware enforcement.

🔑

Intel® Total Memory Encryption — Multi-Key

Full-memory AES-XTS encryption across ZAM and DDR6 paths, keyed per boot; multi-key variant isolates VM/container memory domains.

🗝️

Intel® Key Locker

AES key handles stored in silicon — applications reference handles instead of plaintext keys, preventing memory-dump key extraction.

🧷

Intel® Secure Key

Hardware digital random number generator (RDRAND / RDSEED).

🧱

Intel® Control-Flow Enforcement Technology (CET)

Hardware shadow stack + indirect branch tracking — blocks ROP / JOP exploitation.

🥾

Intel® Boot Guard

Cryptographically-verified UEFI boot — bootkits and unsigned firmware cannot execute.

🏛️

Intel® Trusted Execution Technology (TXT)

Hardware-measured launch environment, verified against the PSM root of trust.

🚫

Execute Disable Bit

Hardware NX enforcement, preventing code execution from data pages.

🛑

Intel® OS Guard (SMEP/SMAP)

Blocks kernel-mode execution of user-space code and unauthorized kernel access to user memory.

🎯

Mode-based Execute Control (MBEC)

Hypervisor-enforced per-page execute permissions, hardening VM-based security products.

⚙️

Intel® VT-x / VT-d / VT-x with EPT

Hardware virtualization, directed I/O (IOMMU) and extended page tables, exposed across all active Compute Tiles.

🛰️

Intel® Virtualization Technology with Redirect Protection (VT-rp)

Hardware protection against hypervisor-level redirection attacks.

🧮

AES-NI / SHA-NI

Hardware-accelerated cryptographic instruction extensions on UHP and DP cores.

🧰

Intel® Stable IT Platform Program (SIPP)

Guaranteed 15-month image-stability window for enterprise deployment.

Advanced Technologies▼

🧠

Intel® Thread Director

Dedicated in-fabric scheduling tile making sub-100-nanosecond core, GPU and NPU placement decisions — not a software layer.

⚡

AFFINITY™ Power System

Supersaver / Efficiency / Balanced / Performance / Unleashed profiles, hardware-enforced by Thread Director and the LPNPU co-pilot.

💡

FOveros 2.0

Photonic tile-to-tile interconnect, co-developed with Lightmatter (USA), replacing copper die-to-die links with on-package optical signaling.

🔗

ASSI 2.0

Advanced Stacked Silicon Interconnect — the 0.4µm-pitch hybrid bond used to stack SoRT on Klangkerne.

💾

Intel DirectStorage 2.0

Staged data path from DDR6 through ZAM to the Kache Kore bLLC for fast asset streaming.

🚀

V8 HyperBOOST

Not applicable — no Compute Tile present on this SKU.

🎛️

Intel® Speed Shift Technology

Hardware-controlled P-state selection, removing OS DVFS latency.

🌙

Idle States

Full ACPI C-state support across all five core classes.

📉

Enhanced Intel SpeedStep® Technology

Dynamic voltage/frequency scaling per core class.

🌡️

Thermal Monitoring Technologies

Per-core and per-tile digital thermal sensors feeding Thread Director's burst and throttle decisions.

🧭

Intel® Volume Management Device (VMD)

Hardware-level NVMe RAID and hot-plug management via the I/O tile.

🎙️

Intel® Gaussian & Neural Accelerator (GNA)

Milliwatt-class always-on audio inference — see AI — GNA section.

🧩

Intel® Deep Learning Boost

AMX-INT8 / AMX-BF16 matrix acceleration on UHP/DP cores, complementing HNPU and XMX5.

Package Specifications▼

Sockets Supported

BGA (integrated, non-socketed)

Package Carrier

FCBGA

Package Size

12mm × 10mm

Thermal Solution Specification

OEM-specified

Max Operating Temperature

105°C

T Junction Max

105°C

Power & AFFINITY™▼

AFFINITY™ Profile	Package Power	Context	Behavior	Runtime / Duty	Cooling Requirement
Supersaver	0.05W	Battery	LP Island only — UHE/LPE cores idle-parked, screen dimmed, media and radio blocks power-gated. The assured minimum running power on battery.	~370h on a 18.5Wh battery	Fanless
Efficiency	0.3W	Battery	LP Island active for everyday light use — MFX/IPU and the LPNPU wake on demand under Thread Director.	~61.7h on a 18.5Wh battery	Fanless / passive
Balanced	3W	Charger	Sustained cTDP with the UHE cores and Arc Druid iGPU active under typical mixed phone load.	On charger — not battery-optimized	Passive phone chassis
Performance	5W	Charger	Sustained Max Turbo across all active tiles — UHE cores, Druid iGPU and the LPNPU boosted, thermally gated by Thread Director.	On charger — sustained ceiling	Phone vapor chamber, throttles under sustained load
Unleashed	Not available	—	Not exposed on the phone tiers — Atom carries no UHP cores, so V8 HyperBOOST and Unleashed AFFINITY™ never engage. Performance is the sustained ceiling.	Not applicable	—

Package power is derived from tile composition (LP Island core count, Arc Druid class, LPNPU throughput) under Intel's AFFINITY™ power-profile model. Supersaver's 0.05W floor is the assured minimum running power while on battery with the display active; it is not a full system-off state. Unleashed is not exposed on the phone tiers. Battery-life figures assume a representative 18.5Wh phone pack and do not model display or radio power.

Tile Power State by AFFINITY™ Profile

Tile / Domain	Supersaver	Efficiency	Balanced	Performance	Unleashed
LP Island (UHE/LPE + Druid + BionzXR + LPNPU)	Active	Active	Active	Active	Active
Compute Tile	—	—	—	—	—
Elementalist GPU	—	—	—	—	—
HNPU	—	—	—	—	—
V8 HyperBOOST	—	—	—	—	—

Intel, the Intel logo, Core, Core Ultra, Xeon, Arc, Thunderbolt, Killer, vPro, QuickSync, Thread Director, PowerVia, Foveros, and Turbo Boost are trademarks of Intel Corporation or its subsidiaries. Klangkerne, SoRT, Sonoral and AcoustX are trademarks used under the Eventide co-engineering program.
Specifications subject to change. Performance and power numbers represent theoretical maximums under ideal conditions; AFFINITY™ power figures are derived from tile composition.
Intel® Atom™ Ultra 3 535HL Processor · Eventide Generation · Intel Corporation 2028 · All rights reserved.