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Intel Corporation · Eventide Architecture · 2028
Intel® Core™ Xeon® 7 578HK Processor
Intel® Core™ Xeon® 500 Series Processors · Eventide Generation · 24MB Cache, up to 5.9 GHz (9.9 GHz HyperBOOST)
Core Xeon 500 HK · Unlocked Mobile FOveros 2.0 Photonic 333 TOPS AI (NPU)
5.9 GHz
Max Turbo
204
Physical Cores
333
NPU AI TOPS
~32 MB + 3 GB
Total Cache
Interactive Die Map — hover to inspect, click to drill in
Essentials▲
Product Collection
Intel® Core™ Xeon® 500 Series Processors (Eventide)
Code Name
Eventide · one-off generation, spiritual successor to Lunar Lake + Panther Lake
Processor Number
Intel® Core™ Xeon® 7 578HK
Vertical Segment
Mobile (HK — Unlocked)
Status
Launched
Launch Date
Q4 2028
Lithography (Primary — Compute)
Intel 04A (0.4nm-class GaNSi GAA) · Compute Tiles, HNPU, Elementalist GPU
Lithography (Efficiency — LP Island) ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
Intel 06E (0.6nm-class FinFlex GAA) · LP Island cores, Arc Druid, BionzXR, LPNPU
Lithography (Ancillary) ?2D Kanvas Renderer — a shader-free 2D compositing tile that lets 3D GPU tiles power down entirely at idle.
Intel 14A-E · MFX, IPU, 2DKR, I/O, Klangkerne, PSM, Killer S1, Display, GNA
Package Interconnect ?Intel's photonic tile-to-tile interconnect, co-developed with Lightmatter (USA). Replaces copper die-to-die links with on-package optical signaling.
Intel FOveros 2.0 (FiberOptic-VEROS) — photonic; co-developed with Lightmatter (USA)
Total Tiles on Package
19
Recommended Customer Price
$5,340 USD
Supplemental Information▼
Marketing Status
Launched
Embedded Options Available
No
Use Conditions
Workstation Laptop / Workstation
Datasheet
Contact Intel / OEM
CPU Specifications▲
Total Physical Cores
204
Total Logical Threads
216
Compute Tiles
2
Total UHP Cores (Solar Eclipse)
16
Total DP Cores (Sunset Cove)
12
Total SPE Cores (Venusmont)
144
Total UHE Cores (Lunar Eclipse)
16
Total LPE Cores (Darkmont)
16
UHP Base / Max Turbo
2.4 GHz / 5.9 GHz
UHP V8 HyperBOOST (peak) ?V8 HyperBOOST — an 8–40ms hardware-scheduled burst clock above sustained Max Turbo, thermally gated and scheduled entirely by Thread Director.
9.9 GHz · all 8 UHP cores, Ford-inspired V8 firing sequence 1-4-6-3-8-5-7-2, 8–40ms burst window, Unleashed AFFINITY™ only — requires external PSU + cooler, auto-disabled on battery
DP Base / Max Turbo
2.1 GHz / 5.1 GHz
SPE Base / Max Turbo
1.8 GHz / 3.6 GHz
UHE Base / Max Turbo
1.6 GHz / 4.8 GHz
LPE Base / Max Turbo
0.8 GHz / 3 GHz
Overclocking
Yes — UHP, DP, SPE; per-tile granular multiplier unlock
Instruction Set Extensions
AVX2, AVX-512 (UHP/DP only), AMX-Tile, AMX-INT8, AMX-BF16, AES-NI, SHA-NI
Instruction Set
64-bit
Intel® 64
Yes
Thread Director Scheduling Classes ?A dedicated in-fabric scheduling tile making hardware-native, sub-100ns core/GPU/NPU placement decisions.
5 hardware classes (UHP/DP/SPE/UHE/LPE) + GPU-coupled RT/BVH dispatch class
Total L2 Cache
220 MB
Processor Base Power
38W
Maximum Turbo Power
87W
Intel® Deep Learning Boost (CPU)
Yes — AMX-INT8, AMX-BF16
AI Software Frameworks Supported (CPU)
OpenVINO, DirectML, WindowsML, PyTorch, TensorFlow
Intel® UPI Speed
24 GT/s
Max # of UPI Links
4
High Priority Cores
51
High Priority Core Frequency
5.9 GHz
Low Priority Cores
153
Low Priority Core Frequency
3.6 GHz
Compute Tile — Solar Eclipse + Sunset Cove + Venusmont▼
Every Compute Tile on this SKU is identical — a single reticle carrying three purpose-built core designs side by side. This SKU carries 2 of them.
Tile Instances
2
Cores per Tile (UHP + DP + SPE)
8 + 6 + 72 = 86
UHP (Solar Eclipse) per Tile
8
DP (Sunset Cove) per Tile
6
SPE (Venusmont) per Tile
72
Process Node
Intel 04A (0.4nm-class GaNSi GAA)
L3 per Tile (shared)
12 MB
L3 Total (all tiles)
24 MB
UHP Max Turbo / HyperBOOST ?V8 HyperBOOST — an 8–40ms hardware-scheduled burst clock above sustained Max Turbo, thermally gated and scheduled entirely by Thread Director.
5.9 GHz / 9.9 GHz
Tile-to-Fabric Interconnect ?Intel's photonic tile-to-tile interconnect, co-developed with Lightmatter (USA). Replaces copper die-to-die links with on-package optical signaling.
FOveros 2.0 photonic · direct link to Kache Kore™ and Thread Director
LP Island Tile▼
The LP Island is present on every Eventide SKU — even fanless, GPU-less parts — and is the last domain to power down. It bundles efficiency cores, the always-on Arc Druid iGPU, BionzXR media encode, and LPNPU inferencing into a single tile.
UHE Cores (Lunar Eclipse)
16
LPE Cores (Darkmont)
16
UHE Base / Max Turbo
1.6 GHz / 4.8 GHz
LPE Base / Max Turbo
0.8 GHz / 3 GHz
Process Node
Intel 06E (0.6nm-class FinFlex GAA)
L3 (LP Island, shared)
8 MB
Integrated LP iGPU
Arc® Druid D390 LP · see dedicated Graphics — Arc Druid section
Integrated Media Engine ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
QuickSync BionzXR, 8 cores · see Media & Imaging section
Integrated NPU
LPNPU, 88 TOPS · see AI — LPNPU section
Minimum Assured Power (Supersaver)
0.5W
Cache Specifications▼
L0 (UHP, per core)
96 KB instruction + 64 KB data
L0 (DP, per core)
128 KB instruction + 80 KB data
L0 (UHE, per core)
48 KB instruction buffer
L1 (UHP/DP, per core)
256 KB
L1 (SPE, per 9-core cluster)
128 KB shared
L1 (UHE, per core)
128 KB
L1 (LPE, per 4-core cluster)
128 KB shared
L2 (UHP, per core)
4 MB
L2 (DP, per core)
6 MB
L2 (SPE, per 9-core cluster)
2 MB shared
L2 (UHE, per core)
3 MB
L2 (LPE, per 4-core cluster)
1 MB shared
Total L0 / L1 / L2 (approx.)
4224 KB / 11776 KB / 220 MB
L3 (Compute Tile, shared)
12 MB per tile · 24 MB total (2 tiles)
L3 (LP Island, shared) ?A large shared L4 / bLLC cache pool acting as latency-hiding DRAM for hot working sets, shared across CPU, GPU and NPU tiles.
8 MB (Kache Kore™ shared)
Kache Kore™ L4 / bLLC ?A large shared L4 / bLLC cache pool acting as latency-hiding DRAM for hot working sets, shared across CPU, GPU and NPU tiles.
3 GB · shared cache interposer at the physical center of the package
Total SRAM Cache (approx.)
~32 MB SRAM + 3 GB L4 bLLC
Kache Kore™ Round-Trip Latency ?A large shared L4 / bLLC cache pool acting as latency-hiding DRAM for hot working sets, shared across CPU, GPU and NPU tiles.
9 ns typical
Memory Specifications▼
Primary Memory Type ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
Intel® Z-Angle Memory (ZAM) · FOveros-mounted on-package memory
ZAM Architecture ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
Vertical-stack, TSV-interconnected chips mounted directly on the FOveros 2.0 substrate
ZAM Controllers ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
2× dual-channel ZAM controllers, 2–3 TB/s each
Max ZAM Capacity ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
1 TB + inline ECC
ZAM Bandwidth ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
5,088 GB/s aggregate
ZAM Latency (raw) ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
~+40% vs GDDR7 · masked for hot data by Kache Kore™ (~8ns)
DDR6 / LPDDR6X Support
3rd dual-channel controller — Core Ultra 500 / Xeon 500 only
Max DDR6 Capacity
1 TB
DDR6 Speed
DDR6-9000 / LPDDR6X-9800
Max Total Memory ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
Up to 2 TB unified (ZAM + DDR6)
Max # of Memory Channels ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
2× ZAM + 1× DDR6/LPDDR6X (3 total)
Memory Coherency ?Intel's photonic tile-to-tile interconnect, co-developed with Lightmatter (USA). Replaces copper die-to-die links with on-package optical signaling.
Hardware cache coherency across all tiles via FOveros 2.0 · <2ns signalling · zero-copy CPU↔GPU↔NPU
Intel DirectStorage 2.0 ?Intel DirectStorage 2.0 — a staged data path from DDR6 through ZAM to the Kache Kore bLLC for fast asset streaming.
NVMe → DDR6 staging → ZAM runtime → Kache Kore™ bLLC hot data
ECC Memory Support ?Z-Angle Memory — Intel's on-package, FOveros-stacked memory subsystem.
Yes — inline ECC correction on both ZAM and DDR6 paths
Graphics — Elementalist GPU Tile▼
Arc® Elementalist E1080 — the primary high-performance graphics tile. This SKU carries 1 instance, presented to the OS as a single logical GPU over FOveros 2.0.
Graphics Tile
Intel® Arc® Elementalist E1080
Tile Instances
1
Process Node
Intel 04A
Xe5-Cores per Tile
220
Total Xe5-Cores
220
Shading Units (total)
112,640
GPU Boost Clock
2.36 GHz
XMX5 AI Units (total) ?Fifth-generation Xe Matrix eXtensions — the matrix/AI acceleration units embedded in each Elementalist GPU tile.
1,760 · 16,896 AI TOPS combined
RTU5 Ray Tracing Units (total) ?Fifth-generation Ray Tracing Units — dedicated BVH traversal and intersection hardware on each Elementalist GPU tile.
880
Render Slices (total)
28
Xe Vector Engines (total)
3,520
Multi-Tile Presentation
Single tile — native presentation
Device ID
0xE10701
VR Support
Yes — native VRV1 / VRV2 codec hardware
DirectX Support
DirectX 12 Ultimate (FL 12_2)
OpenGL / Vulkan Support
OpenGL 4.6 / Vulkan 1.4
OpenCL Support
OpenCL 3.0
oneAPI Support
Yes — Intel oneAPI / Level Zero
OpenVINO Support
Yes
Intel® XeSS Support ?Fifth-generation Xe Matrix eXtensions — the matrix/AI acceleration units embedded in each Elementalist GPU tile.
Yes — XeSS 3 (XMX5-accelerated)
Media Profiles ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
Same codec set as BionzXR — AV2, AV1, H.266/VVC, H.265, H.264, VP9 decode; hardware VR codec transport (VRV1/VRV2)
VESA Adaptive Sync
Yes — Full VRR
Max Displays Supported
4
Graphics — Arc Druid (LP)▼
Arc® Druid is the low-power iGPU — a dedicated Xe4E tile capable of driving the full desktop and light 3D without ever spinning up a Compute Tile or an Elementalist GPU tile. On Core i500 it is the ONLY graphics on the package (no Elementalist); the F-suffix removes it entirely, requiring a discrete GPU.
Graphics Tile
Intel® Arc® Druid D390 LP
Process Node
Intel 06E
Xe4E-Cores
12
Shading Units
3,072
Boost Clock
1.81 GHz
Function
Always-on low-power 3D + desktop composition fallback
DirectX Support
DirectX 12 Ultimate (FL 12_1)
Power Envelope
Min 0.3W standby, max ~3W active
Graphics — 2DKanvas (2D)▼
2DKanvas (2DKR) is purpose-built 2D silicon — zero 3D ALUs, zero shaders, zero Z-buffers. Every transistor is dedicated to rendering the desktop at sub-millisecond latency for well under a watt, so the 3D GPU tiles can power down entirely at idle.
Tile ?2D Kanvas Renderer — a shader-free 2D compositing tile that lets 3D GPU tiles power down entirely at idle.
2DKanvas (2DKR)
Process Node
Intel 14A-E
Function
Dedicated 2D/GUI compositor; no 3D ALUs
Blitter Engine
Modernised hardware blend/scale/composite pipeline
Typical Power
< 1W sustained desktop composition
Enables
Full desktop responsiveness with every 3D GPU tile powered off
Display Engine▼
Max Displays Supported
4 simultaneous native
iDP (Intel Display Protocol) 1.0
Up to 7,680×4,320 @ 480 Hz · in-house eDP derivative over PCIe 6.0 ×16×3 · up to 2× ports
iDP Color Depth
Up to 96-bit (RGB+MCY)
DisplayPort
DP 2.1b UHBR20
eDP
eDP 1.6
HDMI
HDMI 2.2
Codec Transport
VRV1 / VRV2 over iDP — carries resolutions exceeding raw link bandwidth compressed, without quality loss
Variable Refresh Rate
Full VRR · XCD-LED DIAC
HDR Support ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
HDR10+ Ultra, Dolby Vision 2 (via BionzXR tone-mapping)
Display Stream Compression
VESA DSC 1.2a
Unified Display Engine
Any GPU tile (Elementalist, Druid, 2DKanvas) can drive any output — no MUX switching, no GPU-to-GPU frame copy
AI — HNPU▼
HNPU is the primary high-throughput AI inference tile, fabricated on Intel's leading-edge 04A node, separate from both CPU and GPU tiles.
Tile
HNPU (High-Performance NPU)
Process Node
Intel 04A
Peak Throughput
237 TOPS
Supported Datatypes
INT2, INT4, INT8, FP8, BF16, FP16, FP32
Function
Primary system AI inference — generative models, vision, background tasks
Coordination ?Fifth-generation Xe Matrix eXtensions — the matrix/AI acceleration units embedded in each Elementalist GPU tile.
Scheduled by Thread Director alongside LPNPU and GPU XMX5 engines
AI — LPNPU▼
LPNPU delivers always-on inferencing — wake-on-voice, presence sensing, and Thread Director's predictive co-pilot — within a sub-1.5W envelope, and never powers down.
Tile
LPNPU (Always-On NPU)
Process Node
Intel 06E
Peak Throughput
88 TOPS
Power Envelope
< 1.5W, always-on
Function ?A dedicated in-fabric scheduling tile making hardware-native, sub-100ns core/GPU/NPU placement decisions.
Wake-on-voice, presence sensing, Thread Director predictive co-pilot
AI — GNA (Audio NPU)▼
GNA is a milliwatt-class always-on inference tile dedicated to audio intelligence — noise suppression, wake word, and speaker isolation.
Tile ?Gaussian & Neural Accelerator — a milliwatt-class always-on inference tile dedicated to audio intelligence.
GNA 5.0 (Gaussian & Neural Accelerator)
Process Node
Intel 14A-E
Peak Throughput
8 TOPS
Function ?Intel's always-on audio DSP pipeline, accelerated by the GNA tile for noise suppression and wake-word detection.
Intel® Smart Sound Technology acceleration — noise suppression, wake word, speaker isolation
Power Envelope
< 100 mW typical
Audio — Klangkerne▼
Klangkerne is the base die of Eventide's audio stack — an 18mm² DSP die carrying the mixer/DSP grid, the Tiefton resonator bank and the Hallraum output stage, co-engineered with Bang & Olufsen's acoustic engineering group in Copenhagen.
Tile
Klangkerne (Audio DSP Base Die)
Die Size
18 mm²
Process Node
Intel 14A-E
Mixer / DSP Grid
Multi-channel real-time mixing and effects DSP
Tiefton Resonator Bank
Physical-modeling resonance synthesis for spatial reverb
Hallraum Output Stage
Final transducer-matched rendering + codec bridge
Stacked Die ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.
SoRT (Sound Ray Tracing) — hybrid-bonded on top · see dedicated SoRT section
Intel® Smart Sound Technology ?Intel's always-on audio DSP pipeline, accelerated by the GNA tile for noise suppression and wake-word detection.
Yes — accelerated by the GNA tile
Intel® High Definition Audio
Yes
Audio — SoRT (Sound Ray Tracing)▼
SoRT (Sound Ray Tracing) is a dedicated 7.2mm² die hybrid-bonded onto Klangkerne via Foveros 2.0 — the world's first shipping consumer sound-ray-tracing silicon, computing real acoustic reflection and diffraction fields in hardware.
Tile ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.
SoRT (Sound Ray Tracing Die)
Die Size
7.2 mm²
Process Node
Intel 04A
Bond to Klangkerne
Foveros 2.0 hybrid bond · 0.4µm pitch · +38µm package height
SoRT Clusters ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.
×4 · fixed-function pipeline, no shader cores — feature-uniform across tiers, ray budget quantity-scaled
Traversal Engine (per cluster)
96M ray-steps/s · 210 mW peak
Diffraction Unit (per cluster)
2.4M UTD edge-diffraction evaluations/s
Binaural Divergence Unit (per cluster)
512 paths/frame forked · 1.08× ray overhead
IR Assembler (per cluster)
8-frame history · 2,048-tap staging buffer
Material LUT (per cluster)
64 × 8 bands × 16-bit SRAM · 1-cycle access
Ray Budget (total)
24,576 ray-paths per 128-sample audio block
Max Concurrent Sources
256
Real-Time Deadline ?Intel's audio ray-tracing platform brand — the software/driver layer that programs the SoRT die.
2.67 ms hard deadline per acoustic block (Sonoral™ runtime contract)
Typical Power
~118 mW · vs. 1.8W+ for a CPU-software approximation of the same field
Ray-Traced Frame Cost
0.0% — never shares the GPU render path
Hybrid-Bond Handoff Latency ?Sound Ray Tracing — a dedicated die stacked on the Klangkerne audio tile via Foveros 2.0, computing hardware-accelerated acoustic reflection and diffraction.
0.02 ms (SoRT parametric IR → Klangkerne convolution engine)
Programmed By ?Intel's audio ray-tracing platform brand — the software/driver layer that programs the SoRT die.
Sonoral™ runtime, under the AcoustX™ platform brand
Audio — Sonoral™ & AcoustX™ Platform▼
🎧
Sonoral™ Runtime
The software/driver layer that programs the SoRT die — enforces the 2.67ms real-time acoustic block deadline and hands parametric impulse responses to Klangkerne.
🔊
AcoustX™ Platform
Intel's acoustic ray-tracing platform brand, covering SoRT hardware and the Sonoral runtime together — the marketed name for Eventide's spatial audio stack.
🎚️
Intel® Smart Sound Technology
Always-on audio DSP pipeline, accelerated by the GNA tile for continuous noise suppression and wake-word detection.
🎙️
Intel® High Definition Audio
Standard multi-channel HD audio codec interface, layered beneath Klangkerne's DSP pipeline.
Media & Imaging▼
QuickSync BionzXR Cores ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
8 cores (Intel 06E) — co-developed with Sony Semiconductor
BionzXR Encode Codecs ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
AV2 (world-first hardware encoder), AV1, H.266/VVC, H.265, H.264, VRV1, VRV2, ProRes
BionzXR Decode Codecs ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
All encode codecs + VP9, VP8, MPEG-4, VC-1
Max Encode Resolution
8K120 ProRes; 8K240 AV1; 4K480 AV2
MFX QuickSync (Low-Power) ?QuickSync BionzXR — Intel × Sony's flagship media encode/decode engine, including the industry's first shipping AV2 hardware encoder.
AV2, AV1, H.266, H.265, H.264, VP9 decode · ~35% lower power than BionzXR for sustained playback
IPU Version ?Image Processing Unit — Intel × Sony's camera pipeline tile, supporting up to 201MP native sensor input.
Intel IPU 8.2 (Intel 14A-E)
Max Camera Input
201 MP — native USB-C / Thunderbolt sensor ingestion
Intel® Gaussian & Neural Accelerator ?Gaussian & Neural Accelerator — a milliwatt-class always-on inference tile dedicated to audio intelligence.
Yes (GNA 5.0) · see AI — GNA section
Expansion Options▼
PCIe Revision
PCIe 6.0
PCI Express Configurations
1×16, 2×8, 4×4, 8×2
Max # of PCI Express Lanes
64
Thunderbolt Version
Thunderbolt 6 · 160 Gbps symmetric / 240 Gbps boost; supports Intel×Sony eDP 2.0 tunnel
Thunderbolt Ports
Up to 4
USB Specification
USB4 Gen 4×2 (80 Gbps), USB 3.2 Gen 2×2
Intel® DirectStorage Storage Path ?Intel DirectStorage 2.0 — a staged data path from DDR6 through ZAM to the Kache Kore bLLC for fast asset streaming.
PCIe 6.0 NVMe · ~24 GB/s sustained via I/O tile
Scalability
1S / 2S / 4S / 8S
Wireless & Connectivity▼
WiFi Specification ?Intel × OPPO's Killer SignalBoost S1 wireless tile — Wi-Fi 7, Bluetooth 6.2 and 5G cellular with SONAR presence sensing.
Intel® Killer™ Wi-Fi 7 (802.11be) — via Killer SignalBoost S1
WiFi Chips
2× X1 chips (8 bands total)
Bluetooth
Bluetooth Core 6.2
Cellular
5G Sub-6 / mmWave, 4G LTE, VoLTE
Antenna Support
Up to 2× 360° Intel LinkBoost antennae; SONAR user presence via WiFi signal
Intel® Wake on Voice
Yes (LPNPU-powered; always-on)
Intel® Wake on Wi-Fi (SONAR)
Yes
Security & Manageability▼
🛡️
Intel® vPro® Eligibility
Hardware-rooted vPro for Xeon-class manageability and fleet security.
🕵️
Intel® Threat Detection Technology (TDT)
NPU + hardware performance-monitor anomaly detection on the PSM tile — 150+ MITRE ATT&CK behaviors, ransomware and cryptojacking detection below the OS.
📡
Intel® Active Management Technology (AMT)
Out-of-band remote management via CSME 2.0 — works even when the OS is crashed, hung, or powered off.
🔐
Microsoft Pluton 2.1
Hardware TPM 2.1 + Pluton security processor, integrated into the PSM tile as a root of trust below the OS — parallel to Alloy OS's EGP root.
🧩
Eventide Guardian Protocol (EGP)
Intel-developed silicon root of trust for Alloy OS — on-tile AES-256 key vault, per-app hardware attestation, anti-rollback firmware enforcement.
🔑
Intel® Total Memory Encryption — Multi-Key
Full-memory AES-XTS encryption across ZAM and DDR6 paths, keyed per boot; multi-key variant isolates VM/container memory domains.
🗝️
Intel® Key Locker
AES key handles stored in silicon — applications reference handles instead of plaintext keys, preventing memory-dump key extraction.
🧷
Intel® Secure Key
Hardware digital random number generator (RDRAND / RDSEED).
🧱
Intel® Control-Flow Enforcement Technology (CET)
Hardware shadow stack + indirect branch tracking — blocks ROP / JOP exploitation.
🥾
Intel® Boot Guard
Cryptographically-verified UEFI boot — bootkits and unsigned firmware cannot execute.
🏛️
Intel® Trusted Execution Technology (TXT)
Hardware-measured launch environment, verified against the PSM root of trust.
🚫
Execute Disable Bit
Hardware NX enforcement, preventing code execution from data pages.
🛑
Intel® OS Guard (SMEP/SMAP)
Blocks kernel-mode execution of user-space code and unauthorized kernel access to user memory.
🎯
Mode-based Execute Control (MBEC)
Hypervisor-enforced per-page execute permissions, hardening VM-based security products.
⚙️
Intel® VT-x / VT-d / VT-x with EPT
Hardware virtualization, directed I/O (IOMMU) and extended page tables, exposed across all active Compute Tiles.
🛰️
Intel® Virtualization Technology with Redirect Protection (VT-rp)
Hardware protection against hypervisor-level redirection attacks.
🧮
AES-NI / SHA-NI
Hardware-accelerated cryptographic instruction extensions on UHP and DP cores.
🧰
Intel® Stable IT Platform Program (SIPP)
Guaranteed 15-month image-stability window for enterprise deployment.
🔒
Intel® Trust Domain Extensions (Intel® TDX)
Hardware-isolated confidential-computing VMs, encrypted and inaccessible to the hypervisor.
🏰
Intel® Software Guard Extensions (Intel® SGX)
Hardware enclaves for confidential workloads. Default max EPC size: 512 GB.
🚑
Intel® Run Sure Technology
RAS feature set for mission-critical uptime — machine-check recovery, memory mirroring, and rank-sparing.
Advanced Technologies▼
🧠
Intel® Thread Director
Dedicated in-fabric scheduling tile making sub-100-nanosecond core, GPU and NPU placement decisions — not a software layer.
⚡
AFFINITY™ Power System
Supersaver / Efficiency / Balanced / Performance / Unleashed profiles, hardware-enforced by Thread Director and the LPNPU co-pilot.
💡
FOveros 2.0
Photonic tile-to-tile interconnect, co-developed with Lightmatter (USA), replacing copper die-to-die links with on-package optical signaling.
🔗
ASSI 2.0
Advanced Stacked Silicon Interconnect — the 0.4µm-pitch hybrid bond used to stack SoRT on Klangkerne.
💾
Intel DirectStorage 2.0
Staged data path from DDR6 through ZAM to the Kache Kore bLLC for fast asset streaming.
🚀
V8 HyperBOOST
All 8 UHP (Solar Eclipse) cores run a Ford Mustang V8-inspired offset firing sequence (1-4-6-3-8-5-7-2) to sustain an effective 10 GHz across 8–40ms burst windows — Unleashed AFFINITY™ only, requires external PSU + cooler, auto-disabled the instant the system goes on battery. Exclusive to UHP; no other core class supports it.
🎛️
Intel® Speed Shift Technology
Hardware-controlled P-state selection, removing OS DVFS latency.
🌙
Idle States
Full ACPI C-state support across all five core classes.
📉
Enhanced Intel SpeedStep® Technology
Dynamic voltage/frequency scaling per core class.
🌡️
Thermal Monitoring Technologies
Per-core and per-tile digital thermal sensors feeding Thread Director's burst and throttle decisions.
🧭
Intel® Volume Management Device (VMD)
Hardware-level NVMe RAID and hot-plug management via the I/O tile.
🎙️
Intel® Gaussian & Neural Accelerator (GNA)
Milliwatt-class always-on audio inference — see AI — GNA section.
🧩
Intel® Deep Learning Boost
AMX-INT8 / AMX-BF16 matrix acceleration on UHP/DP cores, complementing HNPU and XMX5.
🔗
Intel® UPI (Ultra Path Interconnect)
24 GT/s coherent socket-to-socket fabric for multi-socket Xeon 500 scale-out, up to 4 links per socket.
🚀
Intel® QuickAssist Technology (QAT)
Hardware-accelerated cryptography and lossless compression, offloaded from the compute tiles.
⚖️
Intel® Dynamic Load Balancer (DLB)
Hardware work-queue balancing across cores for packet-processing and event-driven workloads.
📊
Intel® Data Streaming Accelerator (DSA)
Hardware-accelerated data movement and transformation, offloading memcpy-class operations.
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Intel® In-Memory Analytics Accelerator (IAA)
Hardware-accelerated analytics primitives — filtering, compression, decompression for in-memory databases.
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Intel® Advanced Matrix Extensions (AMX)
Tile-based matrix multiply units on DP cores for INT8/BF16 inference and training acceleration.
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Intel® Speed Select Technology — Performance Profile (SST-PP)
Per-core-count, per-frequency performance profiles selectable at boot for workload-tuned configurations.
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Intel® Speed Select Technology — Core Power (SST-CP)
Prioritized power allocation to high-priority core groups under contention.
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Intel® Speed Select Technology — Turbo Frequency (SST-TF)
Elevated turbo ceilings for designated high-priority cores at the expense of the rest.
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Intel® Speed Select Technology — Base Frequency (SST-BF)
Guaranteed base frequency for high-priority cores under sustained AVX-heavy load.
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Intel® Resource Director Technology (Intel® RDT)
Cache and memory-bandwidth allocation/monitoring per VM or container — prevents noisy-neighbor contention.
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Intel® Transactional Synchronization Extensions
Hardware lock elision for high-concurrency data structures.
Package Specifications▼
Sockets Supported
FCLGA-Eventide-X (workstation/server)
Package Carrier
FCLGA
Package Size
58.5mm × 51mm
Thermal Solution Specification
Datacenter liquid / air, OEM-specified
Max Operating Temperature
105°C
T Junction Max
105°C
DTS Max
105°C
TCASE
81°C
Max CPU Configuration
1S / 2S / 4S / 8S — see Scalability
ECC Memory Supported
Yes
Power & AFFINITY™▼
1W10W100W1000W2000W Supersaver BATTERY 0.5W Efficiency BATTERY 3.5W Balanced ADAPTER 38W Performance ADAPTER 87W Unleashed DOCKED 750W
AFFINITY™ ProfilePackage PowerContextBehaviorRuntime / DutyCooling Requirement
Supersaver0.5WBatteryLP Island only — UHE/LPE cores idle-parked, screen dimmed, Compute/GPU tiles fully power-gated. The assured minimum running power on battery.~140h on a 70Wh batteryFanless
Efficiency3.5WBatteryLP Island active for everyday light use — Compute Tiles and GPU tiles stay parked unless woken by Thread Director.~20h on a 70Wh batteryFanless / passive
Balanced38WAdapterSustained cTDP with Compute Tiles and iGPU active under typical mixed load.Plugged in — not battery-optimizedStandard laptop fan
Performance87WAdapterSustained Max Turbo across all active tiles — Compute, GPU and HNPU boosted, thermally gated by Thread Director.Plugged in — sustained ceilingActive laptop cooling, fans audible
Unleashed750WDockedDock-fed ceiling with liquid-assisted cooling. Scales with Compute Tile and Elementalist GPU tile count — requires a compatible power-delivery dock.Dock power delivery onlyLiquid-assisted power-delivery dock required
Package power is derived from tile composition (Compute Tiles, Elementalist GPU tiles, HNPU throughput) under Intel's AFFINITY™ power-profile model. Supersaver's 0.5W floor is the assured minimum running power while on battery with the display active; it is not a full system-off state. Unleashed requires a compatible cooling + power-delivery dock and is only exposed on unlocked SKUs. Battery-life figures assume a representative 70Wh laptop pack and do not model display or radio power.
Tile Power State by AFFINITY™ Profile
Tile / DomainSupersaverEfficiencyBalancedPerformanceUnleashed
LP Island (UHE/LPE + Druid + BionzXR + LPNPU)ActiveActiveActiveActiveActive
Compute Tiles ×2ParkedParkedActiveTurboMax
Elementalist GPUParkedParkedIdleActiveMax
HNPUParkedIdleActiveActiveMax
V8 HyperBOOSTOffOffOffOff10 GHz
Intel, the Intel logo, Core, Core Ultra, Xeon, Arc, Thunderbolt, Killer, vPro, QuickSync, Thread Director, PowerVia, Foveros, and Turbo Boost are trademarks of Intel Corporation or its subsidiaries. Klangkerne, SoRT, Sonoral and AcoustX are trademarks used under the Eventide co-engineering program.
Specifications subject to change. Performance and power numbers represent theoretical maximums under ideal conditions; AFFINITY™ power figures are derived from tile composition.
Intel® Core™ Xeon® 7 578HK Processor · Eventide Generation · Intel Corporation 2028 · All rights reserved.