Platform Security & Management · PSM Tile · Intel 14A-E
Security Beneath the Software
Security hardware that runs independent of any OS, any firmware, any attack surface — isolated in its own tile with its own power domain.
Intel (Primary)
Microsoft Pluton 2.1
EGP (In-House)
CSME 2.0
Intel Management Engine
Dual Root of Trust Architecture
The PSM tile implements a parallel dual-root architecture — EGP for Alloy OS deployments and Microsoft Pluton 2.1 for Windows compatibility. This design enables enterprise flexibility: customers can deploy Alloy OS exclusively with EGP's hardware attestation model, or maintain a Windows dual-boot with Pluton, or select a hybrid strategy. Each root maintains separate key stores, measurement chains, and firmware binding mechanisms.
For Xeon 500 class deployments, this dual-root model is essential. It eliminates vendor lock-in at the hardware security boundary while ensuring FIPS 140-3 and NIST SP800-193 compliance across both ecosystems.
EGP Path (Alloy OS)
Eventide Guardian Protocol — Intel-developed silicon root of trust exclusive to the PSM tile for Alloy OS security models.
- On-tile AES-256 key vault
- Secure boot measurement chain
- Per-app hardware attestation tokens
- Anti-rollback firmware enforcement
- Isolated from Pluton domain
Pluton Path (Windows)
Microsoft Pluton 2.1 — hardware TPM 2.1 integrated into the CPU die for native Windows security posture.
- Hardware-based credential storage
- BitLocker key isolation
- Windows Hello hardware root
- Firmware updates via Windows Update
- FIPS 140-3 Level 2 certified
Eventide Guardian Protocol (EGP)
Intel-developed Silicon Root of Trust
EGP is the hardware security foundation of the Alloy OS ecosystem. Unlike software-based TPMs or firmware-mediated security, EGP resides on the PSM tile itself with a dedicated power domain, executing independently of the main processor, operating system, hypervisor, or bootloader. EGP cannot be disabled, downgraded, or compromised by any host-side firmware or software attack.
Key Property: EGP keys never leave the PSM tile. All cryptographic operations (signing, attestation, key derivation) occur in isolated hardware. The protocol ensures that even a full compromise of the main OS yields no access to EGP key material or measurement secrets.
Core Functions
On-Tile Key Vault
AES-256 master keys stored in non-volatile memory within the PSM tile. Protects against physical memory attacks, DMA probes, and side-channel extraction.
Secure Boot Chain
Each bootloader, kernel, and firmware component is cryptographically measured on first execution. Deviations halt the system. Historical measurements are logged for audit.
Per-App Attestation
Applications request hardware-signed proofs of their execution environment — CPU state, loaded kernel modules, memory layout. Proves integrity to remote verifiers.
Anti-Rollback
Firmware version numbers are locked in one-way counters on the PSM tile. Prevents downgrade attacks; security patches cannot be reverted.
Measurement Cache
Attestation measurements are cached in EGP memory, enabling rapid proof generation without re-measuring on every request. Cache is protected by HMAC.
Attestation Binding
Attestation tokens include PCRs (Platform Configuration Registers), nonces, and tile firmware version. Prevents replay and cross-system attestation forgery.
Enterprise Value: EGP enables hardware-rooted supply chain verification. Container images can be signed with EGP attestation, proving they ran in the declared environment. Ransomware and code-injection attacks fail to generate valid attestations, preventing lateral movement.
Microsoft Pluton 2.1
Hardware TPM 2.1 for Windows Ecosystems
Microsoft Pluton 2.1 is a dedicated security processor integrated into the CPU die, operating independently of the main cores. It provides hardware-rooted TPM 2.1 functionality without reliance on discrete chips or firmware subsystems that could be compromised.
Key Capabilities
- Hardware Credential Storage: Encryption keys, certificates, and passwords are sealed in hardware. Extraction requires Pluton's private key, which is never exposed even in kernel dumps.
- BitLocker Key Isolation: Windows disk encryption keys are stored in Pluton. Even with administrator privileges, BitLocker keys remain inaccessible to Windows processes.
- Windows Hello Hardware Root: Biometric credentials are bound to Pluton hardware. Cloned or VM-based identities cannot forge Hello authentication.
- Firmware Updates via Windows Update: Pluton firmware is updated through the Windows Update infrastructure, ensuring synchronized security patches across enterprises.
- Physical Memory Attack Resistance: Pluton memory is isolated from the main processor and RAM. DMA attacks, cold-boot attacks, and hardware probes cannot extract Pluton data.
- FIPS 140-3 Level 2 Certified: Pluton meets federal cryptographic standards for classified and sensitive government workloads.
Coexistence with EGP: Pluton and EGP operate independently. Windows deployments use Pluton for Windows security functions; Alloy OS uses EGP. Both can coexist on the same physical system, each with its own measurement chains and key stores. This enables hybrid organizations to run mixed OS fleets on identical hardware.
Intel Converged Security & Management Engine (CSME 2.0)
Out-of-Band Management & Hardware DRM
Intel CSME 2.0 is a discrete management processor embedded on the PSM tile. It provides out-of-band access, hardware DRM enforcement, and secure firmware loading for all other processor tiles — including compute, I/O, and memory controllers.
Core Functions
Active Management Technology (AMT)
Manage the system remotely even when the OS has crashed, hung, or been powered off (as long as power is present). SSH into a crashed system, capture system state, trigger reboot, or run diagnostics without OS cooperation.
Hardware DRM Root
CSME enforces DRM policies for protected content — 4K video playback, license validation, codec restrictions. Prevents OS-level DRM circumvention.
Secure Firmware Loading
All tile firmware (compute, I/O, memory controllers) is cryptographically signed and verified by CSME before execution. Corrupted or unsigned firmware cannot boot.
CSME Power Domain
CSME operates on its own power supply, remaining active even during suspend, hibernate, or standby. Enables wake-on-LAN, remote diagnostics, and always-available out-of-band channels.
Enterprise Deployment: CSME 2.0 enables datacenter-scale fleet management. Out-of-band channels bypass OS firewalls and network stacks, giving IT control even when systems are misconfigured or compromised. Combined with vPro, this creates enterprise resilience infrastructure.
Intel vPro & Threat Detection Technology (TDT)
Xeon 500 vPro Certification & AI-Assisted Threat Detection
vPro is Intel's managed platform certification, mandatory for Xeon 500 class deployments. It bundles AMT, hardware virtualization, and threat detection. Threat Detection Technology (TDT) is the newest vPro component — an AI-driven security system that detects ransomware, cryptojacking, and supply chain attacks before they reach the OS.
Threat Detection Technology (TDT)
TDT combines a dedicated NPU (Neural Processing Unit) on the PSM tile with hardware performance monitoring. It continuously observes processor activity — cache behavior, memory access patterns, execution timing — looking for anomalies consistent with ransomware encryption, mining loops, or fuzzing activity.
How TDT Works: Machine learning models trained on known ransomware, cryptojacking, and exploitation patterns run on the NPU. The hardware performance monitor feeds events at line rate. When anomalies are detected, TDT can trigger hardware breakpoints, pause execution, or alert the hypervisor/OS without requiring OS cooperation.
Detection Coverage
- 150+ MITRE ATT&CK Behaviors: TDT models cover execution, privilege escalation, defense evasion, and exfiltration tactics from the MITRE framework.
- Ransomware Encryption Detection: Rapid repeated memory writes + encryption instructions trigger alerts before file systems are compromised.
- Cryptojacking Detection: Long-running AES/SHA loops with cache patterns consistent with mining trigger alerts.
- Supply Chain Attack Detection: Unusual code injection, DLL side-loading, and module load anomalies are flagged for inspection.
- Hardware-Immune Detection: TDT sees behavior that OS-level EDR cannot — memory access patterns, cache behavior, raw CPU cycles — enabling detection of attacks that evade userspace monitoring.
vPro Platform Requirements
- Active Management Technology (AMT): Out-of-band management and provisioning.
- VT-x & VT-d: Hardware virtualization and DMA remapping for hypervisor deployments.
- Intel Trusted Execution Technology: Hardware-protected execution enclaves.
- Control-Flow Enforcement Technology (CET): Hardware protection against return-oriented programming (ROP) and jump-oriented programming (JOP) exploits.
- Threat Detection Technology: NPU-assisted anomaly detection.
Additional Security Features
Beyond EGP, Pluton, CSME, and TDT, the PSM tile integrates an ecosystem of security technologies designed to protect against firmware attacks, memory attacks, and code injection:
Intel Boot Guard
Verified UEFI boot: UEFI firmware is cryptographically signed by Intel. Bootkit infections and UEFI rootkits cannot execute unsigned code.
Intel CET (Control-Flow Enforcement)
Hardware shadow stack + indirect branch tracking. Prevents return-oriented programming (ROP), jump-oriented programming (JOP), and call-stack hijacking.
Intel Key Locker
AES key handles stored in silicon. Applications use key handles instead of plaintext keys, preventing memory dumps and side-channel key extraction.
VT-d (IOMMU)
I/O Memory Management Unit. DMA devices are restricted to assigned memory ranges, preventing rogue devices from reading arbitrary RAM.
Intel SGX-NG (Next-Gen)
Secure enclaves for Alloy OS trusted applications. Enclaves run in isolated memory, invisible to the OS. EGP can attest to enclave identity.
NIST SP800-193 FPR
Platform Firmware Resiliency standard compliance. Ensures firmware recovery, rollback protection, and integrity measurement against firmware attacks.
PSM Tile Specification
| Component |
Specification |
Status |
| Hardware Root of Trust |
Eventide Guardian Protocol (EGP) + Microsoft Pluton 2.1 |
Dual-root architecture |
| Key Storage |
On-tile non-volatile memory, AES-256 |
Hardware isolated |
| Attestation |
EGP: Per-app hardware attestation tokens; Pluton: TPM 2.1 PCRs |
Real-time capable |
| Boot Security |
Measured boot, Intel Boot Guard, anti-rollback counters |
NIST SP800-193 compliant |
| Management |
Intel CSME 2.0 + Active Management Technology (AMT) |
Out-of-band capable |
| Threat Detection |
TDT: NPU + hardware performance monitoring, 150+ MITRE behaviors |
AI-assisted, real-time |
| Cryptography |
Intel Key Locker, CET, SGX-NG, VT-d, Boot Guard |
FIPS 140-3 Level 2 |
| Power Domain |
Dedicated; remains active in suspend/standby |
Always-on capable |
| Compliance |
vPro certified, FIPS 140-3, NIST SP800-193, EAL 3+ |
Government deployable |
| Firmware Updates |
EGP: OEM signed; Pluton: Windows Update channel |
Synchronized release cycle |
Key Use Cases
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Enterprise Fleet Management
CSME 2.0 and AMT enable out-of-band management of thousands of systems. IT teams can remotely diagnose failures, push patches, and recover compromised systems without user cooperation — even when the OS is unresponsive.
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Hardware-Attested AI Inference
AI models can request EGP attestation, proving they executed in a verified environment. Supply chains and compliance audits can validate that sensitive AI models ran on genuine, uncompromised hardware with no unauthorized modifications.
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Secure Content Pipeline (DRM)
CSME DRM root + Pluton hardware bindings enforce license policies for protected media — 4K video, digital audio, streaming. Content cannot be circumvented at the OS level.